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NXP Semiconductors /QN908XC /FLASH /ERASE_CTRL

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Interpret as ERASE_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PAGE_IDXL0PAGE_IDXH0 (HALF_ERASEL_EN)HALF_ERASEL_EN 0 (HALF_ERASEH_EN)HALF_ERASEH_EN 0 (PAGE_ERASEL_EN)PAGE_ERASEL_EN 0 (PAGE_ERASEH_EN)PAGE_ERASEH_EN

Description

flash erase control register

Fields

PAGE_IDXL

Low 256KB page erase index
PAGE_IDXH

High 256KB page erase index
HALF_ERASEL_EN

Write ‘1’ to Enable Mass Erase Low 256KB Flash; Write ‘0’ is inactive. This bit is set by software and reset at the end of low 256KB flash mass erase operation by hardware.
HALF_ERASEH_EN

Write ‘1’ to Enable Mass Erase High 256KB Flash; Write ‘0’ is inactive. This bit is set by software and reset at the end of high 256KB flash mass erase operation by hardware.
PAGE_ERASEL_EN

Low 256KB block page erase enable. This bit initiates a page erase operation when set. This bit is set by software and reset at the end of page erase operation by hardware.
PAGE_ERASEH_EN

High 256KB block page erase enable. This bit initiates a page erase operation when set. This bit is set by software and reset at the end of page erase operation by hardware.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data